Differences

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--- oberheimmatrix1000 [2016-07-26 08:16] – [radare2] link to 6809 plugin gde
+++ oberheimmatrix1000 [2016-09-26 20:21] (current) – [6850 UART] gde
@@ Line 5: / Line 5: @@
 http://www.vintagesynth.com/oberheim/mat1000.php
-===== github repo =====
+===== Schematics =====
+{{ :matrix1ksch.zip |}}
+===== Github repo =====
 https://github.com/8BitPimp/OberheimMatrix1000
@@ Line 38: / Line 42: @@
 Gareth is working on a [[https://github.com/gareth8118/radare2-extras/tree/6809wip|6809 plugin for radare2]] specifically for this project.
+==== Matrix 6/100 links ====
+http://www.tauntek.com/Matrix6Firmware.htm
+http://www.tauntek.com/codeinfo.txt
+http://wolzow.mindworks.ee/analog/m1k-firmware.htm
 ===== Memory Map =====
 <code>
-x0000
+x0000-0x1fff:
     I/O*
     U819: {
-x0000 T1*
+x0000-0x03ff T1*
-x0400 T2*
+x0400-0x07ff T2*
-x0800 T3*
+x0800-0x0bff T3*
-x0c00 T4*
+x0c00-0x0fff T4*
         T1-T4 are 82C54 Programmable Timers
 x1000 DAC
@@ Line 71: / Line 84: @@
             b10000000 - DAC 4
-x1400 UORV* {
+x1400-0x17ff UORV* {
-x1400 - $ U809 - 68850 - UART (if A9 = 0)
+x1400-0x15ff - $ U809 - 68B50 - UART (if A9 = 0) {
-x1600 - 82C54 Programmable Timer (if A9 = 1)
+x1406 - Control/Status {
+                Control (write-only) {
+                    Bit 0: Counter Divide Select 0 (CR0)
+                    Bit 1: Counter Divide Select 1 (CR1)
+                    Bit 2: Word Select 1 (CR2)
+                    Bit 3: Word Select 2 (CR3)
+                    Bit 4: Word Select 3 (CR4)
+                    Bit 5: Transmit Control 1 (CR5)
+                    Bit 6: Transmit Control 2 (CR6)
+                    Bit 7: Receive Interrupt Enable (CR7)
+                }
+                Status (read-only) {
+                    Bit 0: Receive Data Register Full (RDRF)
+                    Bit 1: Transmit Data Register Empty (TDRE)
+                    Bit 2: Data Carrier Detect (/DCD) active low
+                    Bit 3: Clear To Send (/CTS) active low
+                    Bit 4: Framing error (FE)
+                    Bit 5: Receiver Overrun (OVRN)
+                    Bit 6: Parity Error (PE)
+                    Bit 7: Interrupt Request (IRQ)
+                }
+            }
+x1407 - Transmit/Receive Data
+        }
+x1600 - 82C54 Programmable Timer (if A9 = 1) {
             This timer is the source of /IRQ back to the 6809
+x1600 - Counter 0 Register
+x1601 - Counter 1 Register
+x1602 - Counter 2 Register
+x1603 - Control Word Register
+        }
     }
-x1800 SW*
+x1800-0x1bff SW*
         Front panel switches: {
 x1800: Read push buttons 0-7
@@ Line 93: / Line 135: @@
             }
         }
-x1c00
+x1c00-0x1fff WRITE ONLY
         U820: {
-x1c00 L1*
+x1c00-0x1c7f L1* RA1-RA6, NOT
-x1c20 L2*
+x1c80-0x1cff L2* RB1-RB6
-x1c40 L3*
+x1d00-0x1d7f L3* - SYNC1/MUTE/SYNC2
-x1c60 MISC*
+x1d80-0x1dff MISC*
-            $ U818 - 74LS174 - 6bit latch {
+            $ U818 - 74LS174 - 6bit latch, address bank register {
                 b000001 - VA13
                 b000010 - VA14
@@ Line 107: / Line 149: @@
                 b100000
             }
-x1c80 LED1*
+x1e00-0x1e7f LED1*
-x1ca0 LED2*
+x1e80-0x1eff LED2*
-x1cc0 LED3*
+x1f00-0x1f7f LED3*
             (LED1 to 3 are 7-segment displays labelled DISP 1 to 3 respectively. Segment mapping tbd)
-x1ce0 LED4*
+x1f80-0x1fff LED4*
 single LEDs {
 x01 - CHANNEL
@@ Line 154: / Line 196: @@
 </code>
+===== Component Datasheets =====
+==== 6850 UART ====
+{{ :ef6850p.pdf | Datasheet}}
+==== 82C54 Programmable Interval Timer ====
+{{ :82c54.pdf | Datasheet}}
+===== Using r2 =====
+To start radare2 on the image:
+<code>
+$ r2 -a mc6809 -m 0x8000 27256.bin
+</code>