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oberheimmatrix1000 [2016-07-21 21:57] – bings ae updates gdeoberheimmatrix1000 [2016-09-26 20:21] (current) – [6850 UART] gde
Line 5: Line 5:
 http://www.vintagesynth.com/oberheim/mat1000.php http://www.vintagesynth.com/oberheim/mat1000.php
  
-===== github repo =====+===== Schematics ===== 
 + 
 +{{ :matrix1ksch.zip |}} 
 + 
 +===== Github repo =====
  
 https://github.com/8BitPimp/OberheimMatrix1000 https://github.com/8BitPimp/OberheimMatrix1000
Line 37: Line 41:
 http://radare.org/r/ http://radare.org/r/
  
-Gareth is working on a 6809 plugin for radare2 specifically for this project. +Gareth is working on a [[https://github.com/gareth8118/radare2-extras/tree/6809wip|6809 plugin for radare2]] specifically for this project.  
 + 
 +==== Matrix 6/100 links ==== 
 + 
 +http://www.tauntek.com/Matrix6Firmware.htm 
 + 
 +http://www.tauntek.com/codeinfo.txt 
 + 
 +http://wolzow.mindworks.ee/analog/m1k-firmware.htm 
  
 ===== Memory Map ===== ===== Memory Map =====
  
 <code> <code>
-0x0000+0x0000-0x1fff:
     I/O*     I/O*
     U819: {     U819: {
-    0x0000 T1* +    0x0000-0x03ff T1* 
-    0x0400 T2* +    0x0400-0x07ff T2* 
-    0x0800 T3* +    0x0800-0x0bff T3* 
-    0x0c00 T4*+    0x0c00-0x0fff T4* 
 +        T1-T4 are 82C54 Programmable Timers
     0x1000 DAC     0x1000 DAC
         0x1000         0x1000
Line 70: Line 84:
             b10000000 - DAC 4             b10000000 - DAC 4
  
-    0x1400 UORV* +    0x1400-0x17ff UORV* { 
-        $ U809 - 68850 - UART +     
-    0x1800 SW* +        0x1400-0x15ff - $ U809 - 68B50 - UART (if A9 = 0) { 
-    0x1c00+            0x1406 - Control/Status { 
 +                Control (write-only) { 
 +                    Bit 0: Counter Divide Select 0 (CR0) 
 +                    Bit 1: Counter Divide Select 1 (CR1) 
 +                    Bit 2: Word Select 1 (CR2) 
 +                    Bit 3: Word Select 2 (CR3) 
 +                    Bit 4: Word Select 3 (CR4) 
 +                    Bit 5: Transmit Control 1 (CR5) 
 +                    Bit 6: Transmit Control 2 (CR6) 
 +                    Bit 7: Receive Interrupt Enable (CR7) 
 +                } 
 +                Status (read-only) { 
 +                    Bit 0: Receive Data Register Full (RDRF) 
 +                    Bit 1: Transmit Data Register Empty (TDRE) 
 +                    Bit 2: Data Carrier Detect (/DCD) active low 
 +                    Bit 3: Clear To Send (/CTS) active low 
 +                    Bit 4: Framing error (FE) 
 +                    Bit 5: Receiver Overrun (OVRN) 
 +                    Bit 6: Parity Error (PE) 
 +                    Bit 7: Interrupt Request (IRQ) 
 +                } 
 +            } 
 +            0x1407 - Transmit/Receive Data 
 +        } 
 +        0x1600 - 82C54 Programmable Timer (if A9 = 1) { 
 +            This timer is the source of /IRQ back to the 6809 
 +            0x1600 - Counter 0 Register 
 +            0x1601 - Counter 1 Register 
 +            0x1602 - Counter 2 Register 
 +            0x1603 - Control Word Register 
 +        } 
 +    } 
 +        
 +    0x1800-0x1bff SW* 
 +        Front panel switches: { 
 +            0x1800: Read push buttons 0-7 
 +             
 +            0x1801: Read pushbuttons { 
 +               Bit 7: n/c 
 +               Bit 6: SEL 
 +               Bit 5: BANK 
 +               Bit 4: + 
 +               Bit 3: - 
 +               Bit 2: ENTER 
 +               Bit 1: 9 
 +               Bit 0: 8 
 +            } 
 +        } 
 +    0x1c00-0x1fff WRITE ONLY
         U820: {         U820: {
-        0x1c00 L1* +        0x1c00-0x1c7f L1* RA1-RA6, NOT 
-        0x1c20 L2* +        0x1c80-0x1cff L2* RB1-RB6 
-        0x1c40 L3* +        0x1d00-0x1d7f L3* - SYNC1/MUTE/SYNC2 
-        0x1c60 MISC* +        0x1d80-0x1dff MISC* 
-            $ U818 - 74LS174 - 6bit latch {+            $ U818 - 74LS174 - 6bit latch, address bank register {
                 b000001 - VA13                 b000001 - VA13
                 b000010 - VA14                 b000010 - VA14
Line 87: Line 149:
                 b100000                 b100000
             }             }
-        0x1c80 LED1* +        0x1e00-0x1e7f LED1* 
-        0x1ca0 LED2* +        0x1e80-0x1eff LED2* 
-        0x1cc0 LED3* +        0x1f00-0x1f7f LED3* 
-        0x1ce0 LED4*+            (LED1 to 3 are 7-segment displays labelled DISP 1 to 3 respectively. Segment mapping tbd) 
 +        0x1f80-0x1fff LED4* 
 +            6 single LEDs { 
 +                0x01 - CHANNEL 
 +                0x02 - UNITS 
 +                0x04 - DATA D 
 +                0x08 - EXT. F 
 +                0x40 - FINE T 
 +                0x80 - PITCH 
 +                (bits 4 and 5 not connected) 
 +            }
         }         }
     }     }
Line 118: Line 190:
         0x8000 Rom Base (27256)         0x8000 Rom Base (27256)
         0x8003 Reset Handler         0x8003 Reset Handler
-        0x84b4 IRQ Handler+        0x84b4 IRQ Handler (PIT IRQ)
         0x85e3 FIRQ Handler (Serial IRQ)         0x85e3 FIRQ Handler (Serial IRQ)
         0xFFF0 Vector Table         0xFFF0 Vector Table
Line 124: Line 196:
 </code> </code>
  
 +===== Component Datasheets =====
  
 +==== 6850 UART ====
 +
 +{{ :ef6850p.pdf | Datasheet}}
 +
 +==== 82C54 Programmable Interval Timer ====
 +
 +{{ :82c54.pdf | Datasheet}}
 +===== Using r2 =====
 +
 +To start radare2 on the image:
 +
 +<code>
 +$ r2 -a mc6809 -m 0x8000 27256.bin
 +</code>
oberheimmatrix1000.1469138222.txt.gz · Last modified: 2016-07-21 21:57 by gde
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